457 search results - page 43 / 92 » Simulating dynamic communication systems using the core func... |
TC
2008
13 years 8 months ago
2008
To support dynamic address translation in today's microprocessors, the first-level cache is accessed in parallel with a translation lookaside buffer (TLB). However, this curre...
AES
2008
Springer
13 years 8 months ago
2008
Springer
This paper presents research that led to the design and implementation of an extensible and scalable software framework for the dynamic 3D visualization of simulated construction ...
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
—We present an optimal methodology for dynamic voltage scheduling problem in the presence of realistic assumption such as leakage-power and intra-task overheads. Our contribution...
SIGOPS
2010
13 years 3 months ago
2010
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running ...
CDC
2008
IEEE
13 years 10 months ago
2008
IEEE
Abstract-- This paper studies distributed coordination algorithms for multiple fractional-order systems over a directed communication graph. A general fractional-order consensus mo...