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IPPS
2000
IEEE
14 years 1 months ago
Study of a Multilevel Approach to Partitioning for Parallel Logic Simulation
Parallel simulation techniques are often employed to meet the computational requirements of large hardware simulations in order to reduce simulation time. In addition, partitionin...
Swaminathan Subramanian, Dhananjai Madhava Rao, Ph...
RSP
1999
IEEE
128views Control Systems» more  RSP 1999»
14 years 1 months ago
3-D Floorplanning: Simulated Annealing and Greedy Placement Methods for Reconfigurable Computing Systems
The advances in the programmable hardware has lead to new architectures where the hardware can be dynamically adapted to the application to gain better performance. There are stil...
Kia Bazargan, Ryan Kastner, Majid Sarrafzadeh
TVCG
2012
191views Hardware» more  TVCG 2012»
11 years 11 months ago
Direct Isosurface Visualization of Hex-Based High-Order Geometry and Attribute Representations
—In this paper, we present a novel isosurface visualization technique that guarantees the accurate visualization of isosurfaces with complex attribute data defined on (un)structu...
Tobias Martin, Elaine Cohen, Mike Kirby
ICCD
2004
IEEE
103views Hardware» more  ICCD 2004»
14 years 6 months ago
A Fast Delay Analysis Algorithm for The Hybrid Structured Clock Network
This paper presents a novel approach to reducing the complexity of the transient linear circuit analysis for a hybrid structured clock network. Topology reduction is first used to...
Yi Zou, Yici Cai, Qiang Zhou, Xianlong Hong, Sheld...
HICSS
2003
IEEE
156views Biometrics» more  HICSS 2003»
14 years 2 months ago
Developing Video Services for Mobile Users
Video information, image processing and computer vision techniques are developing rapidly nowadays because of the availability of acquisition, processing and editing tools, which ...
Mohamed Ahmed, Roger Impey, Ahmed Karmouch