The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...
Evgeny Bolotin, Zvika Guz, Israel Cidon, Ran Ginos...
This paper addresses initial ranging (uplink synchronization and power control) for TDD OFDMA systems. Exploiting the channel knowledge from the downlink channel together with ini...
Abstract. Power efficiency has become a key design trade-off in embedded system designs. For system-on-a-chip embedded systems, an external bus interconnects embedded processor co...
According to statistics and future prospects in the next few years world-wide energy consumption will increase significantly. Therefore not only more energy efficient technologi...
Doris Zachhuber, Jakob Doppler, Alois Ferscha, Cor...
This paper describes a core-customization process of a CISC processor core for a given application program. It aims at the power reduction in the CISC processor core by fully util...
You-Sung Chang, Bong-Il Park, In-Cheol Park, Chong...