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» Simulation based deadlock analysis for system level designs
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IEEEPACT
2003
IEEE
14 years 2 months ago
Constraint Graph Analysis of Multithreaded Programs
This paper presents a framework for analyzing the performance of multithreaded programs using a model called a constraint graph. We review previous constraint graph definitions fo...
Harold W. Cain, Mikko H. Lipasti, Ravi Nair
ICCCN
2007
IEEE
14 years 3 months ago
Infrastructure for Cross-Layer Designs Interaction
Abstract—The current system design of mobile ad hoc networks (MANET), derived from their traditional fixed counterparts, cannot fully meet the requirements inherent to the dynam...
Zhijiang Chang, Georgi Gaydadjiev, Stamatis Vassil...
DSD
2004
IEEE
129views Hardware» more  DSD 2004»
14 years 19 days ago
Functional Validation of Programmable Architectures
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
Prabhat Mishra, Nikil D. Dutt
MOBISYS
2007
ACM
14 years 8 months ago
Preserving location privacy in wireless lans
The broadcast and tetherless nature of wireless networks and the widespread deployment of Wi-Fi hotspots makes it easy to remotely locate a user by observing her wireless signals....
Tao Jiang, Helen J. Wang, Yih-Chun Hu
HPCN
1995
Springer
14 years 13 days ago
Using optimistic execution techniques as a parallelisation tool for general purpose computing
Abstract. Optimistic execution techniques are widely used in the field of parallel discrete event simulation. In this paper we discuss the use of optimism as a technique for paral...
Adam Back, Stephen Turner