Sciweavers

943 search results - page 46 / 189
» Simulation based deadlock analysis for system level designs
Sort
View
EMSOFT
2004
Springer
14 years 2 months ago
Scheduling within temporal partitions: response-time analysis and server design
As the bandwidth of CPUs and networks continues to grow, it becomes more attractive, for efficiency reasons, to share such resources among several applications with the minimum le...
Luís Almeida, Paulo Pedreiras
HPCA
2000
IEEE
14 years 1 months ago
Impact of Chip-Level Integration on Performance of OLTP Workloads
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
Luiz André Barroso, Kourosh Gharachorloo, A...
FDL
2008
IEEE
14 years 3 months ago
Contradiction Analysis for Constraint-based Random Simulation
Constraint-based random simulation is state-of-the-art in verification of multi-million gate industrial designs. This method is based on stimulus generation by constraint solving...
Daniel Große, Robert Wille, Robert Siegmund,...
PDSE
1998
126views more  PDSE 1998»
13 years 10 months ago
Validation and Test Generation for Object-Oriented Distributed Software
The development of correct OO distributed software is a daunting task as soon as the distributed interactions are not trivial. This is due to the inherent complexity of distribute...
Thierry Jéron, Jean-Marc Jézé...
EURODAC
1995
IEEE
151views VHDL» more  EURODAC 1995»
14 years 11 days ago
Model of conceptual design of complex electronic systems
Due to the ever increasing complexity of electronic system (ES) design, the conceptual design phase and its realization in later phases of the design stream have become increasing...
Alexander N. Soloviev, Alexander L. Stempkovsky