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ET
2007
101views more  ET 2007»
13 years 8 months ago
Towards Nanoelectronics Processor Architectures
In this paper, we focus on reliability, one of the most fundamental and important challenges, in the nanoelectronics environment. For a processor architecture based on the unreliab...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
PR
2008
113views more  PR 2008»
13 years 8 months ago
Do unbalanced data have a negative effect on LDA?
For two-class discrimination, Ref. [1] claimed that, when covariance matrices of the two classes were unequal, a (class) unbalanced dataset had a negative effect on the performanc...
Jing-Hao Xue, D. Mike Titterington
NN
2006
Springer
126views Neural Networks» more  NN 2006»
13 years 8 months ago
Selective attention through phase relationship of excitatory and inhibitory input synchrony in a model cortical neuron
Neurons in area V 2 and V 4 exhibit stimulus specific tuning to single stimuli, and respond at intermediate firing rates when presented with two differentially preferred stimuli (...
Jyoti Mishra, Jean-Marc Fellous, Terrence J. Sejno...
IEICET
2007
73views more  IEICET 2007»
13 years 8 months ago
An ON-OFF Multi-Rate Loss Model of Finite Sources
Bursty traffic is dominant in modern communication networks and keeps the call-level QoS assessment an open issue. ON-OFF traffic models are commonly used to describe bursty tra...
Ioannis D. Moscholios, Michael D. Logothetis, Mich...
SIAMSC
2008
129views more  SIAMSC 2008»
13 years 8 months ago
Bottom-Up Construction and 2: 1 Balance Refinement of Linear Octrees in Parallel
Abstract. In this article, we propose new parallel algorithms for the construction and 2:1 balance refinement of large linear octrees on distributed memory machines. Such octrees a...
Hari Sundar, Rahul S. Sampath, George Biros