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CODES
2009
IEEE
14 years 1 months ago
Cycle count accurate memory modeling in system level design
In this paper, we propose an effective automatic generation approach for a Cycle-Count Accurate Memory Model (CCAMM) from the Clocked Finite State Machine (CFSM) of the Cycle Accu...
Yi-Len Lo, Mao Lin Li, Ren-Song Tsay
APSEC
2004
IEEE
14 years 1 months ago
Modeling the Impact of a Learning Phase on the Business Value of a Pair Programming Project
Pair programmers need a "warmup phase" before the pair can work at full speed. The length of the learning interval varies, depending on how experienced the developers are...
Frank Padberg, Matthias M. Müller
CODES
2004
IEEE
14 years 1 months ago
Analytical models for leakage power estimation of memory array structures
There is a growing need for accurate power models at the system level. Memory structures such as caches, Branch Target Buffers (BTBs), and register files occupy significant area i...
Mahesh Mamidipaka, Kamal S. Khouri, Nikil D. Dutt,...
EUROMICRO
2004
IEEE
14 years 1 months ago
An Experimental Framework for Testing Web Prefetching Techniques
The popularity of web objects, and by extension the popularity of the web sites, besides the appearance of clear footprints in user's accesses that show a considerable spatia...
Josep Domènech, Ana Pont, Julio Sahuquillo,...
CODES
2006
IEEE
14 years 1 months ago
Automatic phase detection for stochastic on-chip traffic generation
During System on Chip (SoC) design, Network on Chip (NoC) prototyping is used for adapting NoC parameters to the application running on the chip. This prototyping is currently don...
Antoine Scherrer, Antoine Fraboulet, Tanguy Risset