Suitability of the next generation of high-performance computing systems for petascale simulations will depend on a balance between factors such as processor performance, memory p...
Subhash Saini, Dennis C. Jespersen, Dale Talcott, ...
In the emerging high-speed packet-switched networks, fair packet scheduling algorithms in switches and routers will form an important component of the mechanisms that seek to sati...
: In chip design, one of the main objectives is to decrease its clock cycle; however, the existing approaches to timing analysis under uncertainty are based on fundamentally restri...
Michael Orshansky, Wei-Shen Wang, Martine Ceberio,...
We introduce and analyze a deterministic fluid model that serves as an approximation for the Gt/GI/st + GI manyserver queueing model, which has a general time-varying arrival pro...
Parallel algorithm designers need computational models that take first order system costs into account, but are also simple enough to use in practice. This paper introduces the L...