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» Simulation of High-Performance Memory Allocators
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IPPS
1997
IEEE
15 years 6 months ago
DPF: A Data Parallel Fortran Benchmark Suite
We present the Data Parallel Fortran (DPF) benchmark suite, a set of data parallel Fortran codes forevaluatingdata parallel compilers appropriatefor any target parallel architectu...
Y. Charlie Hu, S. Lennart Johnsson, Dimitris Kehag...
CASES
2006
ACM
15 years 6 months ago
High-performance packet classification algorithm for many-core and multithreaded network processor
Packet classification is crucial for the Internet to provide more value-added services and guaranteed quality of service. Besides hardware-based solutions, many software-based cla...
Duo Liu, Bei Hua, Xianghui Hu, Xinan Tang
DATE
2002
IEEE
94views Hardware» more  DATE 2002»
15 years 7 months ago
A Powerful System Design Methodology Combining OCAPI and Handel-C for Concept Engineering
In this paper, we present an efficient methodology to validate high performance algorithms and prototype them using reconfigurable hardware. We follow a strict topdown Hardware/So...
Klaus Buchenrieder, Andreas Pyttel, Alexander Sedl...
CONPAR
1994
15 years 6 months ago
The Rewrite Rule Machine Node Architecture and Its Performance
The Rewrite Rule Machine (RRM) is a massively parallel MIMD/SIMD computer designed with the explicit purpose of supporting veryhigh-level parallel programming with rewrite rules. T...
Patrick Lincoln, José Meseguer, Livio Ricci...
IJHPCA
2007
114views more  IJHPCA 2007»
15 years 2 months ago
An Approach To Data Distributions in Chapel
A key characteristic of today’s high performance computing systems is a physically distributed memory, which makes the efficient management of locality essential for taking adv...
R. E. Diaconescu, Hans P. Zima