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TVLSI
2008
96views more  TVLSI 2008»
13 years 8 months ago
Injection-Locked Clocking: A Low-Power Clock Distribution Scheme for High-Performance Microprocessors
Recently we proposed a new clocking scheme, injection-locked clocking (ILC), to combat deteriorating clock skew and jitter, and hence reduce power consumption in highperformance mi...
Lin Zhang, A. Carpenter, Berkehan Ciftcioglu, Alok...
ET
2007
57views more  ET 2007»
13 years 8 months ago
Oscillation Test Scheme of SC Biquad Filters Based on Internal Reconfiguration
In this paper, we explore general conditions for the oscillation based test of switched-capacitor biquad filter stages. Expressions describing the characteristics of a filter stage...
Uros Kac, Franc Novak
TCAD
2010
106views more  TCAD 2010»
13 years 7 months ago
Modeling the Overshooting Effect for CMOS Inverter Delay Analysis in Nanometer Technologies
—With the scaling of complementary metal–oxide– semiconductor (CMOS) technology into the nanometer regime, the overshooting effect due to the input-to-output coupling capacit...
Zhangcai Huang, Atsushi Kurokawa, Masanori Hashimo...
ICASSP
2011
IEEE
13 years 18 days ago
Energy-optimized high performance FFT processor
This paper proposes an ultra low energy FFT processor suitable for sensor applications. The processor is based on R4MDC but achieves full utilization of computational elements. It...
Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, D...
HIPEAC
2011
Springer
12 years 8 months ago
NoC-aware cache design for multithreaded execution on tiled chip multiprocessors
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
Ahmed Abousamra, Alex K. Jones, Rami G. Melhem