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HPCA
2009
IEEE
14 years 8 months ago
iCFP: Tolerating all-level cache misses in in-order processors
Growing concerns about power have revived interest in in-order pipelines. In-order pipelines sacrifice single-thread performance. Specifically, they do not allow execution to flow...
Andrew D. Hilton, Santosh Nagarakatte, Amir Roth
IPSN
2005
Springer
14 years 1 months ago
QoM and lifetime-constrained random deployment of sensor networks for minimum energy consumption
— We consider the problem of energy efficient random deployment of sensor network. Our goal is to find the sensor node density, or alternatively, the energy resource density at e...
Morteza Maleki, Massoud Pedram
ANSS
2000
IEEE
14 years 22 hour ago
Flow Control and Dynamic Load Balancing in Time Warp
We present, in this paper, an algorithm which integrates flow control and dynamic load balancing in Time Warp. The algorithm is intended for use in a distributed memory environme...
Myongsu Choe, Carl Tropper
MICRO
2008
IEEE
124views Hardware» more  MICRO 2008»
14 years 2 months ago
SHARK: Architectural support for autonomic protection against stealth by rootkit exploits
Rootkits have become a growing concern in cyber-security. Typically, they exploit kernel vulnerabilities to gain root privileges of a system and conceal malware’s activities fro...
Vikas R. Vasisht, Hsien-Hsin S. Lee
APPINF
2003
13 years 9 months ago
A Multithreaded Compiler Backend for High-level Array Programming
Whenever large homogeneous data structures need to be processed in a non-trivial way, e.g. in computational sciences, image processing, or system simulation, high-level array prog...
Clemens Grelck