78 search results - page 14 / 16 » Simultaneous buffer and wire sizing for performance and powe... |
GLVLSI
2003
IEEE
14 years 21 days ago
2003
IEEE
One of the fundamental problems in Deep Sub Micron (DSM) circuits is Simultaneous Switching Noise (SSN), which causes voltage fluctuations in the circuit power/ground networks. In...
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
Embedded system optimization typically considers objectives such as cost, timing, buffer sizes and power consumption. Robustness criteria, i.e. sensitivity of the system to variat...
TJS
2002
13 years 7 months ago
2002
A significant source for enhancing application performance and for reducing power consumption in embedded processor applications is to improve the usage of the memory hierarchy. In...
ADHOCNOW
2008
Springer
13 years 8 months ago
2008
Springer
This paper presents a novel method for optimizing sliding window based continuous queries. We deal with two categories of aggregation operations: stepwise aggregation (e.g. COUNT) ...
EMSOFT
2007
Springer
14 years 1 months ago
2007
Springer
Design space exploration of embedded systems typically focuses on classical design goals such as cost, timing, buffer sizes, and power consumption. Robustness criteria, i.e. sensi...