51 search results - page 9 / 11 » Simultaneous driver and wire sizing for performance and powe... |
ICCAD
2007
IEEE
14 years 4 months ago
2007
IEEE
Abstract— Thermal issues are a primary concern in the threedimensional (3D) integrated circuit (IC) design. Temperature, area, and wire length must be simultaneously optimized du...
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
One of the main tasks in analog design is the sizing of the circuit parameters, such as transistor lengths and widths, in order to obtain optimal circuit performances, such as hig...
ISCA
2007
IEEE
14 years 2 months ago
2007
IEEE
The ever increasing sizes of on-chip caches and the growing domination of wire delay necessitate significant changes to cache hierarchy design methodologies. Many recent proposal...
CORR
2007
Springer
13 years 7 months ago
2007
Springer
— We consider a dense fading multi-user network with multiple active multi-antenna source-destination pair terminals communicating simultaneously through a large common set of K ...
GLVLSI
2003
IEEE
14 years 1 months ago
2003
IEEE
One of the fundamental problems in Deep Sub Micron (DSM) circuits is Simultaneous Switching Noise (SSN), which causes voltage fluctuations in the circuit power/ground networks. In...