Sciweavers

67 search results - page 5 / 14
» Simultaneously improving code size, performance, and energy ...
Sort
View
CASES
2009
ACM
13 years 11 months ago
Exploiting residue number system for power-efficient digital signal processing in embedded processors
2's complement number system imposes a fundamental limitation on the power and performance of arithmetic circuits, due to the fundamental need of cross-datapath carry propaga...
Rooju Chokshi, Krzysztof S. Berezowski, Aviral Shr...
ICCAD
2001
IEEE
184views Hardware» more  ICCAD 2001»
14 years 4 months ago
CALiBeR: A Software Pipelining Algorithm for Clustered Embedded VLIW Processors
In this paper we describe a software pipelining framework, CALiBeR (Cluster Aware Load Balancing Retiming Algorithm), suitable for compilers targeting clustered embedded VLIW proc...
Cagdas Akturan, Margarida F. Jacome
CASES
2006
ACM
14 years 1 months ago
Adaptive and flexible dictionary code compression for embedded applications
Dictionary code compression is a technique where long instructions in the memory are replaced with shorter code words used as index in a table to look up the original instructions...
Mats Brorsson, Mikael Collin
EMSOFT
2004
Springer
14 years 22 days ago
Binary translation to improve energy efficiency through post-pass register re-allocation
Energy efficiency is rapidly becoming a first class optimization parameter for modern systems. Caches are critical to the overall performance and thus, modern processors (both hig...
Kun Zhang, Tao Zhang, Santosh Pande
TCAD
2002
107views more  TCAD 2002»
13 years 7 months ago
Value-sensitive automatic code specialization for embedded software
The objective of this work is to create a framework for the optimization of embedded software. We present algorithms and a tool flow to reduce the computational effort of programs,...
Eui-Young Chung, Luca Benini, Giovanni De Micheli,...