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» Sizing of Processing Arrays for FPGA-Based Computation
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2009
IEEE
14 years 4 months ago
Combining I/O operations for multiple array variables in parallel netCDF
—Parallel netCDF (PnetCDF) is a popular library used in many scientific applications to store scientific datasets. It provides high-performance parallel I/O while maintaining ...
Kui Gao, Wei-keng Liao, Alok N. Choudhary, Robert ...
UIC
2009
Springer
14 years 4 months ago
A Framework to Calibrate a MEMS Sensor Network
The Smart Surface1 project aims at designing an integrated micro-manipulator based on an array of micromodules connected with a 2D array topology network. Each micromodule comprise...
Kahina Boutoustous, Eugen Dedu, Julien Bourgeois
ICPR
2008
IEEE
14 years 11 months ago
A machine learning based scheme for double JPEG compression detection
Double JPEG compression detection is of significance in digital forensics. We propose an effective machine learning based scheme to distinguish between double and single JPEG comp...
Chunhua Chen, Wei Su, Yun Q. Shi
ICCS
2005
Springer
14 years 3 months ago
Data-Parallel Method for Georeferencing of MODIS Level 1B Data Using Grid Computing
Georeference is a basic function of remote sensing data processing. Geo-corrected remote sensing data is an important source data for Geographic Information Systems (GIS) and other...
Yincui Hu, Yong Xue, Jiakui Tang, Shaobo Zhong, Gu...
FPL
2008
Springer
163views Hardware» more  FPL 2008»
13 years 11 months ago
Towards an "early neural circuit simulator": A FPGA implementation of processing in the rat whisker system
We have constructed a FPGA-based "early neural circuit simulator" to model the first two stages of stimulus encoding and processing in the rat whisker system. Rats use t...
Brian Leung, Yan Pan, Chris Schroeder, Seda Ogrenc...