719 search results - page 26 / 144 » Sizing router buffers |
120
Voted
VLSID
2005
IEEE
16 years 4 months ago
2005
IEEE
Buffer insertion method plays a great role in modern VLSI design. Many buffer insertion algorithms have been proposed in recent years. However, most of them used simplified delay ...
120
Voted
ICC
2007
IEEE
15 years 10 months ago
2007
IEEE
— High power dissipation in packet switches and routers is fast turning into a key problem, owing to increasing line speeds and decreasing chip sizes. To address this issue, we i...
166
Voted
CF
2008
ACM
15 years 5 months ago
2008
ACM
To meet growing terabit link rates, highly parallel and scalable architectures are needed for IP lookup engines in next generation routers. This paper proposes an SRAM-based multi...
148
Voted
EUC
2008
Springer
15 years 5 months ago
2008
Springer
The recently proposed Active Queue Management (AQM) is an effective method used in Internet routers for congestion control, and to achieve a tradeoff between link utilization and ...
112
Voted
ICCD
2007
IEEE
16 years 19 days ago
2007
IEEE
As chip multiprocessors (CMPs) become the only viable way to scale up and utilize the abundant transistors made available in current microprocessors, the design of on-chip network...