1859 search results - page 256 / 372 » Sketch-based path design |
145
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ICRA
2007
IEEE
15 years 10 months ago
2007
IEEE
— This video presents a humanoid two-arm system developed as a research platform for studying dexterous twohanded manipulation. The system is based on the modular DLR-Lightweight...
139
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ISCA
2007
IEEE
15 years 10 months ago
2007
IEEE
Due to wire delay scalability and bandwidth limitations inherent in shared buses and dedicated links, packet-switched on-chip interconnection networks are fast emerging as the per...
142
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CASES
2008
ACM
15 years 6 months ago
2008
ACM
Although CMOS feature size scaling has been the source of dramatic performance gains, it has lead to mounting reliability concerns due to increasing power densities and on-chip te...
148
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JSAC
2008
15 years 3 months ago
2008
Interest in underwater acoustic networks has grown rapidly with the desire to monitor the large portion of the world covered by oceans. Fundamental differences between underwater a...
198
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ISPD
2012
ACM
13 years 11 months ago
2012
ACM
Gate sizing in VLSI design is a widely-used method for power or area recovery subject to timing constraints. Several previous works have proposed gate sizing heuristics for power ...