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TON
2010
198views more  TON 2010»
14 years 10 months ago
On Wireless Scheduling Algorithms for Minimizing the Queue-Overflow Probability
Abstract-- In this paper, we are interested in wireless scheduling algorithms for the downlink of a single cell that can minimize the queue-overflow probability. Specifically, in a...
V. J. Venkataramanan, Xiaojun Lin
103
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TVLSI
2010
14 years 10 months ago
A Low-Area Multi-Link Interconnect Architecture for GALS Chip Multiprocessors
A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost, flexible routing capability, and supports globally asynchronous loc...
Zhiyi Yu, Bevan M. Baas
123
Voted
TVLSI
2010
14 years 10 months ago
LOPASS: A Low-Power Architectural Synthesis System for FPGAs With Interconnect Estimation and Optimization
In this paper, we present a low-power architectural synthesis system (LOPASS) for field-programmable gate-array (FPGA) designs with interconnect power estimation and optimization. ...
Deming Chen, Jason Cong, Yiping Fan, Lu Wan
126
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VLSI
2010
Springer
14 years 10 months ago
Spatial EM jamming: A countermeasure against EM Analysis?
Electro-Magnetic Analysis has been identified as an efficient technique to retrieve the secret key of cryptographic algorithms. Although similar mathematically speaking, Power or E...
Francois Poucheret, Lyonel Barthe, Pascal Benoit, ...
176
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DIALM
2003
ACM
175views Algorithms» more  DIALM 2003»
15 years 8 months ago
Localized construction of bounded degree and planar spanner for wireless ad hoc networks
We propose a novel localized algorithm that constructs a bounded degree and planar spanner for wireless ad hoc networks modeled by unit disk graph (UDG). Every node only has to kn...
Yu Wang 0003, Xiang-Yang Li