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PATMOS
2007
Springer
14 years 2 months ago
Soft Error-Aware Power Optimization Using Gate Sizing
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...
Foad Dabiri, Ani Nahapetian, Miodrag Potkonjak, Ma...
DFT
2008
IEEE
117views VLSI» more  DFT 2008»
14 years 2 months ago
Impact of Technology and Voltage Scaling on the Soft Error Susceptibility in Nanoscale CMOS
With each technology node shrink, a silicon chip becomes more susceptible to soft errors. The susceptibility further increases as the voltage is scaled down to save energy. Based ...
Vikas Chandra, Robert C. Aitken
EUSFLAT
2001
13 years 9 months ago
Fuzzy logic in architectural design
Architecture is a multidisciplinary science with many dimensions.For a design task the major part of the design requirements are often qualitative (soft) next to quantitative desi...
Özer Ciftcioglu, S. Durmisevic
RTSS
2007
IEEE
14 years 2 months ago
Integrating Adaptive Components: An Emerging Challenge in Performance-Adaptive Systems and a Server Farm Case-Study
The increased complexity of performance-sensitive software systems leads to increased use of automated adaptation policies in lieu of manual performance tuning. Composition of ada...
Jin Heo, Dan Henriksson, Xue Liu, Tarek F. Abdelza...
PUC
2011
13 years 3 months ago
Shape-changing interfaces
The design of physical interfaces has been constrained by the relative akinesis of the material world. Current advances in materials science promise to change this. In this paper, ...
Marcelo Coelho, Jamie Zigelbaum