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131
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ISHPC
2000
Springer
15 years 7 months ago
Loop Termination Prediction
Deeply pipelined high performance processors require highly accurate branch prediction to drive their instruction fetch. However there remains a class of events which are not easi...
Timothy Sherwood, Brad Calder
114
Voted
ISCAS
1995
IEEE
91views Hardware» more  ISCAS 1995»
15 years 7 months ago
An FPGA Based Reconfigurable Coprocessor Board Utilizing a Mathematics of Arrays
Abstract -- Work in progress at the University of Missouri-Rolla on hardware assists for high performance computing is presented. This research consists of a novel field programmab...
W. Eatherton, J. Kelly, T. Schiefelbein, H. Pottin...
145
Voted
DEBS
2010
ACM
15 years 7 months ago
An event view model and DSL for engineering an event-based SOA monitoring infrastructure
An event-based solution that uses events to convey information to a monitoring tool is well suited to implementing a non-intrusive monitoring infrastructure. This enables an SOA s...
Emmanuel Mulo, Uwe Zdun, Schahram Dustdar
132
Voted
ECMDAFA
2010
Springer
151views Hardware» more  ECMDAFA 2010»
15 years 7 months ago
Generative Technologies for Model Animation in the TopCased Platform
Domain Specific Modeling Languages (DSML) are more and more used to handle high level concepts, and thus bring complex software development under control. The increasingly recurrin...
Xavier Crégut, Benoît Combemale, Marc...
EDBT
2010
ACM
155views Database» more  EDBT 2010»
15 years 7 months ago
Suffix tree construction algorithms on modern hardware
Suffix trees are indexing structures that enhance the performance of numerous string processing algorithms. In this paper, we propose cache-conscious suffix tree construction algo...
Dimitris Tsirogiannis, Nick Koudas
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