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ASPDAC
2012
ACM
334views Hardware» more  ASPDAC 2012»
12 years 5 months ago
GreenDroid: An architecture for the Dark Silicon Age
— The Dark Silicon Age kicked off with the transition to multicore and will be characterized by a wild chase for seemingly ever-more insane architectural designs. At the heart o...
Nathan Goulding-Hotta, Jack Sampson, Qiaoshi Zheng...
ICSE
2008
IEEE-ACM
14 years 10 months ago
VieDAME - flexible and robust BPEL processes through monitoring and adaptation
VieDAME is a tool for monitoring and dynamic service adaptation of BPEL processes. The tool monitors partner service interaction to compute Quality of Service (QoS) data and perfo...
Oliver Moser, Florian Rosenberg, Schahram Dustdar
PPOPP
2010
ACM
14 years 7 months ago
Data transformations enabling loop vectorization on multithreaded data parallel architectures
Loop vectorization, a key feature exploited to obtain high performance on Single Instruction Multiple Data (SIMD) vector architectures, is significantly hindered by irregular memo...
Byunghyun Jang, Perhaad Mistry, Dana Schaa, Rodrig...
ISCAS
2003
IEEE
93views Hardware» more  ISCAS 2003»
14 years 3 months ago
A rescheduling and fast pipeline VLSI architecture for lifting-based discrete wavelet transform
In this paper, we propose a fast pipeline VLSI architecture for 1D lifting-based discrete wavelet transform (DWT). This design method merges the filtering steps called the predict...
Bing-Fei Wu, Chung-Fu Lin
VLSID
2007
IEEE
130views VLSI» more  VLSID 2007»
14 years 10 months ago
Memory Architecture Exploration for Power-Efficient 2D-Discrete Wavelet Transform
The Discrete Wavelet Transform (DWT) forms the core of the JPEG2000 image compression algorithm. Since the JPEG2000 compression application is heavily data-intensive, the overall ...
Rahul Jain, Preeti Ranjan Panda