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ETS
2007
IEEE
128views Hardware» more  ETS 2007»
13 years 9 months ago
Selecting Power-Optimal SBST Routines for On-Line Processor Testing
Software-Based Self-Test (SBST) has emerged as an effective strategy for on-line testing of processors integrated in non-safety critical embedded system applications. Among the mo...
Andreas Merentitis, Nektarios Kranitis, Antonis M....
SAC
2008
ACM
13 years 6 months ago
ECG data provisioning for telehomecare monitoring
The latest computer and communication technologies in combination with an enhanced ECG analysis system can be used to improve cardiac patient's follow-up out-of-hospital. In ...
Bernardo Gonçalves, José Gonç...
DASIP
2010
13 years 2 months ago
High level design space exploration of RVC codec specifications for multi-core heterogeneous platforms
Nowadays, the design flow of complex signal processing embedded systems starts with a specification of the application by means of a large and sequential program (usually in C/C++...
Christophe Lucarz, Ghislain Roquier, Marco Mattave...
CODES
2003
IEEE
14 years 19 days ago
A multiobjective optimization model for exploring multiprocessor mappings of process networks
In the Sesame framework, we develop a modeling and simulation environment for the efficient design space exploration of heterogeneous embedded systems. Since Sesame recognizes se...
Cagkan Erbas, Selin C. Erbas, Andy D. Pimentel
CASES
2005
ACM
13 years 9 months ago
Exploring the design space of LUT-based transparent accelerators
Instruction set customization accelerates the performance of applications by compressing the length of critical dependence paths and reducing the demands on processor resources. W...
Sami Yehia, Nathan Clark, Scott A. Mahlke, Kriszti...