107 search results - page 6 / 22 » Software Cache Coherence for Large Scale Multiprocessors |
JMLR
2006
13 years 7 months ago
2006
Parallel software for solving the quadratic program arising in training support vector machines for classification problems is introduced. The software implements an iterative dec...
IEEEPACT
2008
IEEE
14 years 1 months ago
2008
IEEE
This paper presents the Distributed Cooperative Caching, a scalable and energy-efficient scheme to manage chip multiprocessor (CMP) cache resources. The proposed configuration is...
HIPEAC
2010
Springer
13 years 9 months ago
2010
Springer
Abstract. Customizable processors augmented with application-specific Instruction Set Extensions (ISEs) have begun to gain traction in recent years. The most effective ISEs include...
ISCA
1998
IEEE
13 years 11 months ago
1998
IEEE
Most large shared-memory multiprocessors use directory protocols to keep per-processor caches coherent. Some memory references in such systems, however, suffer long latencies for ...
WMPI
2004
ACM
14 years 29 days ago
2004
ACM
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past dec...