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CODES
2006
IEEE
15 years 10 months ago
Layout aware design of mesh based NoC architectures
Design of System-on-Chip (SoC) with regular mesh based Network-on-Chip (NoC) consists of mapping processing cores to routers, and routing of the traffic traces on the topology suc...
Krishnan Srinivasan, Karam S. Chatha
ISCA
1993
IEEE
137views Hardware» more  ISCA 1993»
15 years 8 months ago
Architectural Support for Translation Table Management in Large Address Space Machines
Virtual memoy page translation tables provide mappings from virtual to physical addresses. When the hardware controlled Tratmlation L.ookaside Buffers (TLBs) do not contain a tran...
Jerome C. Huck, Jim Hays
CASES
2008
ACM
15 years 6 months ago
Compiling custom instructions onto expression-grained reconfigurable architectures
While customizable processors aim at combining the flexibility of general purpose processors with the speed and power advantages of custom circuits, commercially available process...
Paolo Bonzini, Giovanni Ansaloni, Laura Pozzi
SPLC
2004
15 years 5 months ago
Generalized Release Planning for Product Line Architectures
This paper elaborates on the coordination and management of evolving software product-lines, where development teams work around a shared and reusable domain infrastructure. The tr...
Louis J. M. Taborda
ICSEA
2006
IEEE
15 years 10 months ago
Enforcing Interaction Properties in AOSD-Enabled Systems
The construction and maintenance of large and complex software systems depend on the existence of global principles describing the structure and the interaction among its various ...
Constantin Serban, Shmuel S. Tyszberowicz