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ARCS
2009
Springer
14 years 2 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
CGO
2003
IEEE
13 years 11 months ago
Coupling On-Line and Off-Line Profile Information to Improve Program Performance
In this paper, we describe a novel execution environment for Java programs that substantially improves execution performance by incorporating both on-line and off-line profile inf...
Chandra Krintz
CASES
2005
ACM
13 years 9 months ago
Compilation techniques for energy reduction in horizontally partitioned cache architectures
Horizontally partitioned data caches are a popular architectural feature in which the processor maintains two or more data caches at the same level of hierarchy. Horizontally part...
Aviral Shrivastava, Ilya Issenin, Nikil Dutt
ML
2006
ACM
109views Machine Learning» more  ML 2006»
13 years 7 months ago
Cost curves: An improved method for visualizing classifier performance
Abstract This paper introduces cost curves, a graphical technique for visualizing the performance (error rate or expected cost) of 2-class classifiers over the full range of possib...
Chris Drummond, Robert C. Holte
SNPD
2003
13 years 9 months ago
Integration of Simulation Based Performance Assessment in a Software Development Process
From the early design phase through the implementation performance assessment of software has been subject to a great variety of approaches in the past. Performance modeling artif...
Michael N. Barth