2512 search results - page 102 / 503 » Software Transactional Memory |
VLSID
2008
IEEE
14 years 10 months ago
2008
IEEE
With increasing adoption of Electronic System Level (ESL) tools, effective design and validation time has reduced to a considerable extent. Cosimulation is found to be a principal...
HICSS
1995
IEEE
14 years 1 months ago
1995
IEEE
The architecture for a shared memory CPU is described. The CPU allows for parallelism down to the level of single instructions and is tolerant of memory latency. All executable in...
ASPLOS
2004
ACM
14 years 3 months ago
2004
ACM
Tracing garbage collectors traverse references from live program variables, transitively tracing out the closure of live objects. Memory accesses incurred during tracing are essen...
CC
2009
Springer
14 years 5 months ago
2009
Springer
ISORC
2008
IEEE
14 years 4 months ago
2008
IEEE
