2512 search results - page 355 / 503 » Software Transactional Memory |
97
Voted
HPCA
2006
IEEE
16 years 2 months ago
2006
IEEE
The increasing demand for reliable computers has led to proposals for hardware-assisted rollback of memory state. Such approach promises major reductions in Mean Time To Repair (M...
126
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HPCA
2002
IEEE
16 years 2 months ago
2002
IEEE
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...
133
Voted
SAC
2009
ACM
15 years 9 months ago
2009
ACM
Parallel architectures are the way of the future, but are notoriously difficult to program. In addition to the low-level constructs they often present (e.g., locks, DMA, and non-...
120
Voted
ICS
2009
Tsinghua U.
15 years 9 months ago
2009
Tsinghua U.
Ethernet line rates are projected to reach 100 Gbits/s by as soon as 2010. While in principle suitable for high performance clustered and parallel applications, Ethernet requires ...
114
Voted
COMPGEOM
2009
ACM
15 years 9 months ago
2009
ACM
We describe a new implementation of the well-known incremental algorithm for constructing Delaunay triangulations in any dimension. Our implementation follows the exact computing ...