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122
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CAL
2008
15 years 29 days ago
Transaction-Aware Network-on-Chip Resource Reservation
Packet-switched interconnect fabric, widely viewed as the de facto on-chip data communication standard in the many-core era, offers high throughput and excellent scalability. Howev...
Zheng Li, Changyun Zhu, Li Shang, Robert P. Dick, ...
111
Voted
DDECS
2008
IEEE
184views Hardware» more  DDECS 2008»
15 years 8 months ago
Software-Based Self-Test Strategy for Data Cache Memories Embedded in SoCs
— Testing SoC is a challenging task, especially when addressing complex and highfrequency devices. Among the different techniques that can be exploited, Software-Based Selft-Test...
Wilson J. Perez, Jaime Velasco-Medina, Danilo Ravo...
142
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ISPASS
2003
IEEE
15 years 7 months ago
Interplay of energy and performance for disk arrays running transaction processing workloads
The growth of business enterprises and the emergence of the Internet as a medium for data processing has led to a proliferation of applications that are server-centric. The power ...
Sudhanva Gurumurthi, Jianyong Zhang, Anand Sivasub...
AVI
1996
15 years 3 months ago
A visual interface for synchronous collaboration and negotiated transactions
: This paper introduces a visual interface for computer-supported cooperative work (CSCW). The interface is an extension of the editor interface of ESCHER, a prototype database sys...
Lutz Michael Wegner, Manfred Paul 0002, Jens Thamm...
FOSSACS
2005
Springer
15 years 8 months ago
Foundations of Web Transactions
A timed extension of π-calculus with a transaction construct – the calculus webπ – is studied. The underlying model of webπ relies on networks of processes; time proceeds as...
Cosimo Laneve, Gianluigi Zavattaro