This paper discusses four store-based concrete memory models. We characterize memory models by the class of pointers they support and whether they use numerical or symbolic offset...
Simulation of transaction level models (TLMs) is an established embedded systems design technique. Its use cases include virtual prototyping for early software development, platfo...
Abstract—We define here a simple, low level control procedure definition, to support application implementation on a particular multiprocessor platform, namely the SegBus segme...
For very large databases such as those used by banks and airlines, cost considerations may forbid shutting down the service for a long period of time and reorganizing off-line. Si...
An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. Most of the existing built-in self-repair solutions reuse IP-C...