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DAC
2009
ACM
14 years 8 months ago
Context-sensitive timing analysis of Esterel programs
Traditionally, synchronous languages, such as Esterel, have been compiled into hardware, where timing analysis is relatively easy. When compiled into software ? e.g., into sequent...
Lei Ju, Bach Khoa Huynh, Samarjit Chakraborty, Abh...
ASPDAC
2009
ACM
115views Hardware» more  ASPDAC 2009»
14 years 2 months ago
Prototyping pipelined applications on a heterogeneous FPGA multiprocessor virtual platform
— Multiprocessors on a chip are the reality of these days. Semiconductor industry has recognized this approach as the most efficient in order to exploit chip resources, but the ...
Antonino Tumeo, Marco Branca, Lorenzo Camerini, Ma...
DSD
2008
IEEE
165views Hardware» more  DSD 2008»
14 years 1 months ago
Application Analysis for Parallel Processing
Effective mapping of multimedia applications on massively parallel embedded systems is a challenging demand in the domain of compiler design. The software implementations of emerg...
Muhammad Rashid, Damien Picard, Bernard Pottier
DSD
2007
IEEE
164views Hardware» more  DSD 2007»
14 years 1 months ago
Execution-time Prediction for Dynamic Streaming Applications with Task-level Parallelism
— Programmable multiprocessor systems-on-chip are becoming the preferred implementation platform for embedded streaming applications. This enables using more software components,...
Peter Poplavko, Twan Basten, Jef L. van Meerbergen
MEMOCODE
2008
IEEE
14 years 1 months ago
Virtual prototyping AADL architectures in a polychronous model of computation
While synchrony and asynchrony are two distinct concepts of concurrency theory, effective and formally defined embedded system design methodologies usually mix the best from both...
Ma Yue, Jean-Pierre Talpin, Thierry Gautier