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USENIX
2003
13 years 8 months ago
Design and Implementation of Power-Aware Virtual Memory
Despite constant improvements in fabrication technology, hardware components are consuming more power than ever. With the everincreasing demand for higher performance in highly-in...
Hai Huang, Padmanabhan Pillai, Kang G. Shin
ICDCSW
2003
IEEE
14 years 20 days ago
Adaptive Power Control and Selective Radio Activation for Low-Power Infrastructure-Mode 802.11 LANs
We present an integrated dual approach to reduce power consumption in infrastructure-mode 802.11 wireless LANs. A novel distributed power control algorithm adaptively adjusts the ...
Anmol Sheth, Richard Han
CORR
2007
Springer
108views Education» more  CORR 2007»
13 years 7 months ago
SystemC Analysis of a New Dynamic Power Management Architecture
This paper presents a new dynamic power management architecture of a System on Chip. The Power State Machine describing the status of the core follows the recommendations of the A...
Massimo Conti
LCTRTS
2007
Springer
14 years 1 months ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
DATE
1999
IEEE
64views Hardware» more  DATE 1999»
13 years 11 months ago
Dynamic Power Management for non-stationary service requests
Dynamic Power Management is a design methodology aiming at reducing power consumption of electronic systems, by performing selective shutdown of the idle system resources. The eff...
Eui-Young Chung, Luca Benini, Alessandro Bogliolo,...