Abstract—In this paper we introduce Timed Moore Automata, a specification formalism which is used in industrial train control applications for specifying the real-time behavior ...
Ideally in the deployment phase, components should be composable, and their composition checked. Current component models fall short of this ideal. Most models do not allow composi...
— With the success of formal verification techniques like equivalence checking and model checking for hardware designs, there has been growing interest in applying such techniqu...
Franjo Ivancic, Ilya Shlyakhter, Aarti Gupta, Mala...