Traditional software controlled data cache prefetching is often ineffective due to the lack of runtime cache miss and miss address information. To overcome this limitation, we imp...
Jiwei Lu, Howard Chen, Rao Fu, Wei-Chung Hsu, Bobb...
This paper describes the design, implementation and performance of an open, high performance, dynamically extensible router under development at Washington University in St. Louis...
Fred Kuhns, John D. DeHart, Anshul Kantawala, Ralp...
Poor performance on numerical codes has slowed the adoption of Java within the technical computing community. In this paper we describe a prototype array library and a research pr...
Pedro V. Artigas, Manish Gupta, Samuel P. Midkiff,...
Performance modeling and evaluation of embedded hardware/software systems is important to help the CoDesign process. The hardware/software partitioning needs to be evaluated befor...
Jean Paul Calvez, Dominique Heller, Olivier Pasqui...
We study several major characteristics of dynamic optimization within the PARROT power-aware, trace-cachebased microarchitectural framework. We investigate the benefit of providin...
Yoav Almog, Roni Rosner, Naftali Schwartz, Ari Sch...