A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...
The H.264/AVC standard defines an in-loop de- instructions, available in current multimedia SIMD instruction blocking filter which is used in both the encoder and decoder. This set...
Stephen Warrington, Hassan Shojania, Subramania Su...
During the last half-decade, a number of research efforts have centered around developing software for generating automatically tuned matrix multiplication kernels. These include ...
John A. Gunnels, Fred G. Gustavson, Greg Henry, Ro...
We present experimental work which explores how the match (or mismatch) between the input space of the hands and the output space of a graphical display influences twohanded input...
Abstract. The Navy needs to use Multi Level Security (MLS) techniques in an environment with increasing amount of real time computation brought about by increased automation requir...
Brett L. Chappell, David T. Marlow, Philip M. Irey...