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HPCA
1995
IEEE
15 years 7 months ago
Software Cache Coherence for Large Scale Multiprocessors
Shared memory is an appealing abstraction for parallel programming. It must be implemented with caches in order toperform well, however, and caches require a coherence mechanism t...
Leonidas I. Kontothanassis, Michael L. Scott
124
Voted
SIGSOFT
2003
ACM
16 years 4 months ago
Making sense of runtime architecture for mobile phone software
We present a metamodel for runtime architecture and demonstrate with experimental results how this metamodel can be used to recover, analyze and improve runtime architecture of mo...
Alexander Ran, Raimondas Lencevicius
136
Voted
HPCA
1998
IEEE
15 years 8 months ago
Comparative Evaluation of Latency Tolerance Techniques for Software Distributed Shared Memory
A key challenge in achieving high performance on software DSM systems is overcoming their relatively large communication latencies. In this paper, we consider two techniques which...
Todd C. Mowy, Charles Q. C. Chan, Adley K. W. Lo
VLSID
1999
IEEE
139views VLSI» more  VLSID 1999»
15 years 8 months ago
Processor Modeling for Hardware Software Codesign
In hardware - software codesign paradigm often a performance estimation of the system is needed for hardware - software partitioning. The tremendous growth of application specific...
V. Rajesh, Rajat Moona
ICS
1999
Tsinghua U.
15 years 8 months ago
Reducing cache misses using hardware and software page placement
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
Timothy Sherwood, Brad Calder, Joel S. Emer