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ISCA
2006
IEEE
144views Hardware» more  ISCA 2006»
13 years 8 months ago
Conditional Memory Ordering
Conventional relaxed memory ordering techniques follow a proactive model: at a synchronization point, a processor makes its own updates to memory available to other processors by ...
Christoph von Praun, Harold W. Cain, Jong-Deok Cho...
POPL
2007
ACM
14 years 9 months ago
Conditional must not aliasing for static race detection
Race detection algorithms for multi-threaded programs using the common lock-based synchronization idiom must correlate locks with the memory locations they guard. The heart of a p...
Mayur Naik, Alex Aiken
ICSE
2009
IEEE-ACM
14 years 9 months ago
Effective static deadlock detection
We present an effective static deadlock detection algorithm for Java. Our algorithm uses a novel combination of static analyses each of which approximates a different necessary co...
Mayur Naik, Chang-Seo Park, Koushik Sen, David Gay
KBSE
2007
IEEE
14 years 2 months ago
Unit testing concurrent software
There are many difficulties associated with developing correct multithreaded software, and many of the activities that are simple for single threaded software are exceptionally ha...
William Pugh, Nathaniel Ayewah
ASPLOS
2011
ACM
13 years 6 days ago
Specifying and checking semantic atomicity for multithreaded programs
In practice, it is quite difficult to write correct multithreaded programs due to the potential for unintended and nondeterministic interference between parallel threads. A funda...
Jacob Burnim, George C. Necula, Koushik Sen