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HIPEAC
2010
Springer
13 years 5 months ago
Energy and Throughput Efficient Transactional Memory for Embedded Multicore Systems
We propose a new design for an energy-efficient hardware transactional memory (HTM) system for power-aware embedded devices. Prior hardware transactional memory designs proposed a ...
Cesare Ferri, Samantha Wood, Tali Moreshet, R. Iri...
SYRCODIS
2008
95views Database» more  SYRCODIS 2008»
13 years 9 months ago
The Framework for Study Of Caching Algorithm Efficiency
In this paper we offer several models of reference sequences (traces of references) using Markov chains for testing of the replacement policies in caching systems. These models en...
Michael V. Grankov, Ngo Thanh Hung, Mosab Bassam Y...
IWPC
2009
IEEE
14 years 2 months ago
Trace visualization for program comprehension: A controlled experiment
Bas Cornelissen, Andy Zaidman, Arie van Deursen, B...
EUROSYS
2010
ACM
13 years 11 months ago
Locating cache performance bottlenecks using data profiling
Effective use of CPU data caches is critical to good performance, but poor cache use patterns are often hard to spot using existing execution profiling tools. Typical profilers at...
Aleksey Pesterev, Nickolai Zeldovich, Robert T. Mo...