1406 search results - page 230 / 282 » Software trace cache |
MICRO
1995
IEEE
13 years 11 months ago
1995
IEEE
Untolerated load instruction latencies often have a significant impact on overall program performance. As one means of mitigating this effect, we present an aggressive hardware-b...
ISCA
2010
IEEE
13 years 9 months ago
2010
IEEE
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
ISCA
2012
IEEE
11 years 10 months ago
2012
IEEE
The emergence of global-scale online services has galvanized scale-out software, characterized by splitting vast datasets and massive computation across many independent servers. ...
SIGSOFT
2007
ACM
14 years 8 months ago
2007
ACM
Little is known about how developers think about design during code modification tasks or how experienced developers' design knowledge helps them work more effectively. We pe...
ISCA
2007
IEEE
14 years 1 months ago
2007
IEEE
We propose signature-accelerated transactional memory (SigTM), a hybrid TM system that reduces the overhead of software transactions. SigTM uses hardware signatures to track the r...