1406 search results - page 257 / 282 » Software trace cache |
IEEEPACT
2002
IEEE
14 years 14 days ago
2002
IEEE
Simultaneous Multithreading (SMT) processors achieve high processor throughput at the expense of single-thread performance. This paper investigates resource allocation policies fo...
ICCS
2001
Springer
14 years 6 hour ago
2001
Springer
Abstract. Phylogeny reconstruction from molecular data poses complex optimization problems: almost all optimization models are NP-hard and thus computationally intractable. Yet app...
MICRO
1997
IEEE
13 years 11 months ago
1997
IEEE
Compiler optimizations are often driven by specific assumptions about the underlying architecture and implementation of the target machine. For example, when targeting shared-mem...
ANCS
2007
ACM
13 years 11 months ago
2007
ACM
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...
CASES
2007
ACM
13 years 11 months ago
2007
ACM
This paper presents the first automatic scheme to allocate local (stack) data in recursive functions to scratch-pad memory (SPM) in embedded systems. A scratch-pad is a fast direct...