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CASES
2006
ACM
14 years 1 months ago
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitr...
SPAA
2006
ACM
14 years 1 months ago
Modeling instruction placement on a spatial architecture
In response to current technology scaling trends, architects are developing a new style of processor, known as spatial computers. A spatial computer is composed of hundreds or eve...
Martha Mercaldi, Steven Swanson, Andrew Petersen, ...
ISLPED
2005
ACM
93views Hardware» more  ISLPED 2005»
14 years 1 months ago
Power-aware code scheduling for clusters of active disks
In this paper, we take the idea of application-level processing on disks to one level further, and focus on an architecture, called Cluster of Active Disks (CAD), where the storag...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir
VEE
2005
ACM
150views Virtualization» more  VEE 2005»
14 years 1 months ago
Diagnosing performance overheads in the xen virtual machine environment
Virtual Machine (VM) environments (e.g., VMware and Xen) are experiencing a resurgence of interest for diverse uses including server consolidation and shared hosting. An applicati...
Aravind Menon, Jose Renato Santos, Yoshio Turner, ...
LCPC
2004
Springer
14 years 26 days ago
Performance of OSCAR Multigrain Parallelizing Compiler on SMP Servers
Abstract. This paper describes performance of OSCAR multigrain parallelizing compiler on various SMP servers, such as IBM pSeries 690, Sun Fire V880, Sun Ultra 80, NEC TX7/i6010 an...
Kazuhisa Ishizaka, Takamichi Miyamoto, Jun Shirako...