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SBCCI
2009
ACM
188views VLSI» more  SBCCI 2009»
14 years 2 months ago
Low-power inter-core communication through cache partitioning in embedded multiprocessors
We present an application-driven customization methodology for energy-efficient inter-core communication in embedded multiprocessors. The methodology leverages configurable cach...
Chenjie Yu, Xiangrong Zhou, Peter Petrov
ISHPC
2003
Springer
14 years 25 days ago
Code and Data Transformations for Improving Shared Cache Performance on SMT Processors
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...
Dimitrios S. Nikolopoulos
IPCCC
1999
IEEE
13 years 12 months ago
Management policies for non-volatile write caches
Many computer hardware and software architectures buffer data in memory to improve system performance. Volatile disk or file caches are sometimes used to delay the propagation of ...
Theodore R. Haining, Darrell D. E. Long
CSMR
2002
IEEE
14 years 18 days ago
Evolution Support by Homogeneously Documenting Patterns, Aspects and Traces
The evolution of complex software systems is promoted by software engineering principles and techniques like separation of concerns, encapsulation, stepwise refinement, and reusab...
Johannes Sametinger, Matthias Riebisch
SIGSOFT
2009
ACM
14 years 8 months ago
Symbolic pruning of concurrent program executions
We propose a new algorithm for verifying concurrent programs, which uses concrete executions to partition the program into a set of lean partitions called concurrent trace program...
Chao Wang, Swarat Chaudhuri, Aarti Gupta, Yu Yang