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DATE
2008
IEEE
165views Hardware» more  DATE 2008»
14 years 2 months ago
Dynamic Round-Robin Task Scheduling to Reduce Cache Misses for Embedded Systems
Modern embedded CPU systems rely on a growing number of software features, but this growth increases the memory footprint and increases the need for efficient instruction and data...
Ken W. Batcher, Robert A. Walker
PARA
2004
Springer
14 years 1 months ago
Cache Optimizations for Iterative Numerical Codes Aware of Hardware Prefetching
Cache optimizations typically include code transformations to increase the locality of memory accesses. An orthogonal approach is to enable for latency hiding by introducing prefet...
Josef Weidendorfer, Carsten Trinitis
BMCBI
2006
110views more  BMCBI 2006»
13 years 7 months ago
preAssemble: a tool for automatic sequencer trace data processing
Background: Trace or chromatogram files (raw data) are produced by automatic nucleic acid sequencing equipment or sequencers. Each file contains information which can be interpret...
Alexei A. Adzhubei, Jon K. Laerdahl, Anna V. Vlaso...
PEPM
2011
ACM
12 years 10 months ago
Allocation removal by partial evaluation in a tracing JIT
The performance of many dynamic language implementations suffers from high allocation rates and runtime type checks. This makes dynamic languages less applicable to purely algorit...
Carl Friedrich Bolz, Antonio Cuni, Maciej FijaBkow...
PAM
2009
Springer
14 years 2 months ago
Revisiting Route Caching: The World Should Be Flat
Internet routers’ forwarding tables (FIBs), which must be stored in expensive fast memory for high-speed packet forwarding, are growing quickly in size due to increased multihomi...
Changhoon Kim, Matthew Caesar, Alexandre Gerber, J...