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HICSS
1994
IEEE
152views Biometrics» more  HICSS 1994»
13 years 12 months ago
Simple COMA Node Implementations
Shared memory architectures often have caches to reduce the number of slow remote memory accesses. The largest possible caches exist in shared memory architectures called Cache-On...
Erik Hagersten, Ashley Saulsbury, Anders Landin
EUROPAR
1997
Springer
13 years 12 months ago
Modulo Scheduling with Cache Reuse Information
Instruction scheduling in general, and software pipelining in particular face the di cult task of scheduling operations in the presence of uncertain latencies. The largest contrib...
Chen Ding, Steve Carr, Philip H. Sweany
CORR
2007
Springer
111views Education» more  CORR 2007»
13 years 7 months ago
Influence of Memory Hierarchies on Predictability for Time Constrained Embedded Software
Safety-criticalembeddedsystems having to meet real-time constraints are to be highlypredictable in order to guarantee at design time that certain timing deadlines will always be m...
Lars Wehmeyer, Peter Marwedel
HICSS
1997
IEEE
90views Biometrics» more  HICSS 1997»
13 years 12 months ago
A Workload Generation Environment for Trace-Driven Simulation of Shared-Bus Multiprocessors
We describe an environment to produce traces representing significant workloads for a shared-bus shared-memory multiprocessor used as a general-purpose multitasking machine, wher...
Roberto Giorgi, Cosimo Antonio Prete, Gianpaolo Pr...
IWMM
2010
Springer
157views Hardware» more  IWMM 2010»
14 years 15 days ago
Tracing garbage collection on highly parallel platforms
The pervasiveness of multiprocessor and multicore hardware and the rising level of available parallelism are radically changing the computing landscape. Can software deal with tom...
Katherine Barabash, Erez Petrank