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» Software transactional memory for multicore embedded systems
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EUROSYS
2007
ACM
14 years 4 months ago
STMBench7: a benchmark for software transactional memory
Software transactional memory (STM) is a promising technique for controlling concurrency in modern multi-processor architectures. STM aims to be more scalable than explicit coarse...
Rachid Guerraoui, Michal Kapalka, Jan Vitek
PODC
2005
ACM
14 years 1 months ago
Advanced contention management for dynamic software transactional memory
The obstruction-free Dynamic Software Transactional Memory (DSTM) system of Herlihy et al. allows only one transaction at a time to acquire an object for writing. Should a second ...
William N. Scherer III, Michael L. Scott
AOSD
2007
ACM
13 years 11 months ago
Highly configurable transaction management for embedded systems
Embedded systems are an important field of research and will gain momentum in the near future. Many of these systems require data management functionality. Due to the resource con...
Mario Pukall, Thomas Leich, Martin Kuhlemann, Mark...
ASPLOS
2010
ACM
13 years 11 months ago
Fairness via source throttling: a configurable and high-performance fairness substrate for multi-core memory systems
Cores in a chip-multiprocessor (CMP) system share multiple hardware resources in the memory subsystem. If resource sharing is unfair, some applications can be delayed significantl...
Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, Yale N....
HASE
2007
IEEE
14 years 1 months ago
Systems Architectures for Transactional Network Interface
Systems such as software transactional memory and some exception handling techniques use transactions. However, a typical limitation of such systems is that they do not allow syst...
Manish Marwah, Shivakant Mishra, Christof Fetzer