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» Software transactional memory for multicore embedded systems
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MICRO
2009
IEEE
132views Hardware» more  MICRO 2009»
14 years 2 months ago
EazyHTM: eager-lazy hardware transactional memory
Transactional Memory aims to provide a programming model that makes parallel programming easier. Hardware implementations of transactional memory (HTM) suffer from fewer overhead...
Sasa Tomic, Cristian Perfumo, Chinmay Eishan Kulka...
DC
2010
13 years 7 months ago
Model checking transactional memories
Model checking software transactional memories (STMs) is difficult because of the unbounded number, length, and delay of concurrent transactions and the unbounded size of the memo...
Rachid Guerraoui, Thomas A. Henzinger, Vasu Singh
FPGA
2000
ACM
150views FPGA» more  FPGA 2000»
13 years 11 months ago
Programmable memory blocks supporting content-addressable memory
The Embedded System Block (ESB) of the APEX E programmable logic device family from Altera Corporation includes the capability of implementing content addressable memory (CAM) as ...
Frank Heile, Andrew Leaver, Kerry Veenstra
CASES
2000
ACM
14 years 7 hour ago
A dynamic memory management unit for embedded real-time system-on-a-chip
Dealing with global on-chip memory allocation/de-allocation in a dynamic yet deterministic way is an important issue for upcoming billion transistor multiprocessor System-on-a-Chi...
Mohamed Shalan, Vincent John Mooney III
EUROPAR
2009
Springer
14 years 2 months ago
Impact of Quad-Core Cray XT4 System and Software Stack on Scientific Computation
An upgrade from dual-core to quad-core AMD processor on the Cray XT system at the Oak Ridge National Laboratory (ORNL) Leadership Computing Facility (LCF) has resulted in significa...
Sadaf R. Alam, Richard F. Barrett, Heike Jagode, J...