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» Software transactional memory for multicore embedded systems
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IPPS
2010
IEEE
13 years 6 months ago
Efficient hardware support for the Partitioned Global Address Space
We present a novel architecture of a communication engine for non-coherent distributed shared memory systems. The shared memory is composed by a set of nodes exporting their memory...
Holger Fröning, Heiner Litz
CASES
2004
ACM
14 years 21 days ago
Reducing energy consumption of queries in memory-resident database systems
The tremendous growth of system memories has increased the capacities and capabilities of memory-resident embedded databases, yet current embedded databases need to be tuned in or...
Jayaprakash Pisharath, Alok N. Choudhary, Mahmut T...
DATE
2011
IEEE
235views Hardware» more  DATE 2011»
13 years 21 days ago
An Overview of Approaches Towards the Timing Analysability of Parallel Architecture
In order to meet performance/low energy/integration requirements, parallel architectures (multithreaded cores and multi-cores) are more and more considered in the design of embedd...
Christine Rochange
POPL
2009
ACM
14 years 9 months ago
Feedback-directed barrier optimization in a strongly isolated STM
Speed improvements in today's processors have largely been delivered in the form of multiple cores, increasing the importance of ions that ease parallel programming. Software...
Nathan Grasso Bronson, Christos Kozyrakis, Kunle O...
PODC
2005
ACM
14 years 2 months ago
Toward a theory of transactional contention managers
In recent software transactional memory proposals, a contention manager module is responsible for ensuring that the system as a whole makes progress. A number of contention manage...
Rachid Guerraoui, Maurice Herlihy, Bastian Pochon