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» Software transactional memory for multicore embedded systems
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NOCS
2007
IEEE
14 years 3 months ago
The Power of Priority: NoC Based Distributed Cache Coherency
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...
Evgeny Bolotin, Zvika Guz, Israel Cidon, Ran Ginos...
IPPS
2007
IEEE
14 years 3 months ago
Invited Paper: A Compile-time Cost Model for OpenMP
OpenMP has gained wide popularity as an API for parallel programming on shared memory and distributed shared memory platforms. It is also a promising candidate to exploit the emer...
Chunhua Liao, Barbara M. Chapman
DAC
2010
ACM
13 years 9 months ago
Instruction cache locking using temporal reuse profile
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
Yun Liang, Tulika Mitra
SAMOS
2007
Springer
14 years 2 months ago
The Weight-Watcher Service and its Lightweight Implementation
—This paper presents the Weight-Watcher service. This service aims at providing resource consumption measurements and estimations for software executing on resourceconstrained de...
Benoît Garbinato, Rachid Guerraoui, Jarle Hu...
SSS
2010
Springer
103views Control Systems» more  SSS 2010»
13 years 7 months ago
A Provably Starvation-Free Distributed Directory Protocol
Abstract. This paper presents Combine, a distributed directory protocol for shared objects, designed for large-scale distributed systems. Directory protocols support move requests,...
Hagit Attiya, Vincent Gramoli, Alessia Milani