596 search results - page 99 / 120 » Software transactional memory for multicore embedded systems |
IEEEINTERACT
2003
IEEE
14 years 2 months ago
2003
IEEE
For call intensive programs, function calls are major bottlenecks during program execution since they usually force register contents to be spilled into memory. Such register to m...
CODES
2008
IEEE
14 years 3 months ago
2008
IEEE
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
POPL
2011
ACM
12 years 11 months ago
2011
ACM
We consider programs for embedded real-time systems which use priority-driven preemptive scheduling with task priorities adjusted dynamically according to the immediate ceiling pr...
ASPLOS
2004
ACM
14 years 2 months ago
2004
ACM
This paper introduces a compiler-orchestrated prefetching system as a unified framework geared toward ameliorating the gap between processing speeds and memory access latencies. ...
SIGMETRICS
1996
ACM
14 years 28 days ago
1996
ACM
A large and increasing gap exists between processor and memory speeds in scalable cache-coherent multiprocessors. To cope with this situation, programmers and compiler writers mus...