2109 search results - page 414 / 422 » Solving Necklace Constraint Problems |
DAC
2005
ACM
14 years 10 months ago
2005
ACM
We present an efficient optimization scheme for gate sizing in the presence of process variations. Using a posynomial delay model, the delay constraints are modified to incorporat...
ICML
2005
IEEE
14 years 10 months ago
2005
IEEE
The Relevance Vector Machine (RVM) is a sparse approximate Bayesian kernel method. It provides full predictive distributions for test cases. However, the predictive uncertainties ...
DAC
2009
ACM
14 years 4 months ago
2009
ACM
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
ATAL
2009
Springer
14 years 4 months ago
2009
Springer
This paper describes the design, implementation, visualizations, results and lessons learned of a novel real-world socio-technical research system for the purpose of rescheduling ...
IEEEPACT
2008
IEEE
14 years 4 months ago
2008
IEEE
The emergence of power as a first-class design constraint has fueled the proposal of a growing number of run-time power optimizations. Many of these optimizations trade-off power...