234 search results - page 39 / 47 » Sorting and Selection on Distributed Memory Bus Computers |
DAC
2003
ACM
14 years 9 months ago
2003
ACM
A binary decoder is a common component of software development tools such as instruction set simulators, disassemblers and debuggers. The efficiency of the decoder can have a sign...
IPPS
2009
IEEE
14 years 3 months ago
2009
IEEE
In this paper we describe the parallelization of a dynamic programming algorithm used to find common RNA secondary structures including pseudoknots and similar structures. The se...
IPPS
2002
IEEE
14 years 1 months ago
2002
IEEE
The goal of this research is to develop performance profiles of parallel and distributed applications in order to predict their execution time under different network conditions....
FCCM
2004
IEEE
14 years 10 days ago
2004
IEEE
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
IPPS
2007
IEEE
14 years 2 months ago
2007
IEEE
A Reconfigurable Consistency Algorithm (RCA) is an algorithm that guarantees the consistency in Distributed Shared Memory (DSM) Systems. In a RCA, there is a Configuration Control...